1. Field of the Invention
The embodiments discussed herein relate to a switching power supply apparatus, particularly, a switching power supply apparatus including a current-resonant type DC-DC switching converter and having reduced loss and noise when switching is returned in burst control at the time of light load.
2. Background of the Related Art
A current-resonant type DC-DC switching converter is suitable for improvement in efficiency and a reduction in thickness, and therefore, is widely employed in a switching power supply apparatus of, for example, a television. In such a switching power supply apparatus, in addition to control to keep an output voltage constant, automatic burst control is performed in order to improve efficiency at the time of light load.
The automatic burst control is a control method in which a load state indicating whether the load is heavy or light is detected and when the load becomes light, normal control is switched to burst control in which switching is suspended temporarily and when the load becomes heavy, the control returns from the burst control to the normal control.
In the burst control, while switching is stopped, the output voltage lowers, and therefore, when the output voltage becomes a predetermined voltage or less, switching is returned to prevent the output voltage from becoming the predetermined voltage or less (e.g., see Japanese Laid-open Patent Publication No. 2015-104246).
FIG. 9 is a circuit diagram illustrating a configuration example of a conventional switching power supply apparatus, FIG. 10 illustrates a configuration example of a conventional control IC, FIG. 11 is a circuit diagram illustrating a configuration example of a conventional load detection circuit, FIG. 12 is voltage generation timing chart at a point A of a conventional load detection circuit, and FIG. 13 is a timing chart of conventional burst control. Note that, in the following explanation, the terminal name and the voltage, the signal, etc., at its terminal, may be explained by using the same symbol.
As illustrated in FIG. 9, a conventional switching power supply apparatus has an input capacitor C1 connected to input terminals 10p and 10n and receives a DC input voltage Vi. This input voltage Vi is a DC voltage obtained by rectifying and smoothing a voltage of an AC power source, or a high-voltage, constant DC voltage generated by a power factor correction circuit.
To the input terminals 10p and 10n, a series circuit of a high-side switching element Qa and a low-side switching element Qb is connected, thereby forming a half bridge circuit. As the switching elements Qa and Qb, an N-channel MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) is used in the example illustrated in FIG. 9.
A common connection point between the switching elements Qa and Qb is connected to one end of a primary winding P1 of a transformer T1 and the other end of the primary winding P1 is connected to the ground via a resonant capacitor C5. Here, a resonant inductance including an excitation inductance of the primary winding P1 of the transformer T1 and a leakage inductance between the primary winding P1 and secondary windings S1 and S2, and the resonant capacitor C5 form a resonant circuit. Note that, to the drain terminals and the source terminals of the switching elements Qa and Qb, capacitors Ca and Cb are connected, respectively. These capacitors Ca and Cb have equivalent capacitances including an external capacitance, an output capacitance of MOSFET, parasitic capacitances on the plus side and the minus side of the transformer T1, etc.
One end of the secondary winding S1 of the transformer T1 is connected to the anode terminal of a diode D3 and one end of the secondary winding S2 is connected to the anode terminal of a diode D4. The cathode terminals of the diodes D3 and D4 are connected to the positive terminal of an output capacitor C6 and an output terminal 11p. The negative terminal of the output capacitor C6 is connected to a common connection point between the secondary windings S1 and S2 and an output terminal 11n. The secondary windings S1 and S2, the diodes D3 and D4, and the output capacitor C6 form a circuit that rectifies and smooths an AC voltage generated by the secondary windings S1 and S2 and converts the AC voltage into a DC voltage, and form an output circuit of the switching power supply apparatus. The output terminals 11p and 11n are connected to a load, not illustrated.
The output terminal 11p is connected to the anode terminal of a light-emitting diode of a photo coupler PC1 via a resistor R8 and the cathode terminal of the light-emitting diode is connected to the cathode terminal of a shunt regulator SR1. To the anode terminal and the cathode terminal on both ends of the light-emitting diode, a resistor R6 is connected in parallel. The anode terminal of the shunt regulator SR1 is connected to the output terminal 11n. The shunt regulator SR1 has a reference terminal and the reference terminal is connected to a connection point between resistors R9 and R10 connected in series between the positive terminal and the negative terminal of the output capacitor C6. Between the reference terminal and the cathode terminal of the shunt regulator SR1, a series circuit of a resistor R7 and a capacitor C7 is connected. The shunt regulator SR1 causes a current in accordance with a difference between a built-in reference voltage and a divided potential of an output voltage Vo (voltage across both ends of the output capacitance C6) to flow through the light-emitting diode. The collector terminal of the photo transistor of the photo coupler PC1 is connected to an FB terminal of a control IC (Integrated Circuit) (switching control circuit) 12, the emitter terminal is connected to the ground, and between the collector terminal and the emitter terminal, a capacitor C2 is connected in parallel. The photo coupler PC1 and the shunt regulator SR1 form a feedback circuit that feeds back an error between the output voltage Vo and the reference voltage to the control IC 12.
The control IC 12 has a VH terminal connected to the positive terminal of the input capacitor C1 and a GND terminal connected to the ground. The control IC 12 also has an HO terminal connected to the gate terminal of the high-side switching element Qa via a resistor R1, and an LO terminal connected to the gate terminal of the low-side switching element Qb via a resistor R2. The control IC 12 further has a VB terminal, a VS terminal, a CA terminal, an IS terminal, and a VCC terminal. Between the VB terminal and the VS terminal, a capacitor C4 is connected and the VS terminal is connected to the common connection point between the switching elements Qa and Qb. To the CA terminal, one end of a capacitor Cca is connected and the other end of the capacitor Cca is connected to the ground. The IS terminal is connected to a common connection point between the series circuit of a capacitor Cs and a resistor Rs connected in parallel to the resonant capacitor C5. The series circuit of the capacitor Cs and the resistor Rs is a shunt circuit that shunts a resonant current and the current shunted by the shunt circuit is converted into a voltage signal by the resistor Rs for current detection and input to the IS terminal of the control IC 12 as a signal indicating a resonant current. The VCC terminal is connected to the positive terminal of a capacitor C3 and the negative terminal of the capacitor C3 is connected to the ground. The VCC terminal is further connected to the anode terminal of a diode D2 and the cathode terminal of the diode D2 is connected to the VB terminal. Here, although not illustrated in order to simplify FIG. 9, the VCC terminal is connected to an auxiliary winding of the transformer T1 via a diode. After the switching power supply apparatus starts up, the capacitor C3 is charged by the voltage generated by the auxiliary winding and the capacitor C3 is used as the power source of the control IC 12.
As illustrated in FIG. 10, the control IC 12 has a start-up circuit 21 whose input terminal is connected to the VH terminal and the output terminal of the start-up circuit 21 is connected to the VCC terminal and a low-side drive circuit 25. To the FB terminal, the input terminal of an oscillation circuit 22 is connected and the output terminal of the oscillation circuit 22, which outputs an on-trigger signal on_trg and an off-trigger signal off_trg, is connected to a control circuit 23. The output terminal of the control circuit 23, which outputs a high-side drive signal hi_pre, is connected to the input terminal of a high-side drive circuit 24 and the output terminal of the control circuit 23, which outputs a low-side drive signal lo_pre, is connected to the input terminal of the low-side drive circuit 25. The output terminal of the high-side drive circuit 24 is connected to the HO terminal and the output terminal of the low-side drive circuit 25 is connected to the LO terminal. The high-side drive circuit 24 is also connected to the VB terminal for the high-side power source and the VS terminal serving as a high-side reference voltage. The high-side drive circuit 24 also supplies a high-side reference voltage detection signal vs_det having detected the voltage at the VS terminal to the control circuit 23. The CA terminal and the IS terminal are connected to a load detection circuit 26. The load detection circuit 26 receives a signal sw_ctrl corresponding to the voltage at the VS terminal from the control circuit 23 and supplies a burst enable signal bur_en to a burst control circuit 27. The burst control circuit 27 receives the on-trigger signal on_trg from the oscillation circuit 22, receives the burst enable signal bur_en from the load detection circuit 26, and supplies a switching control signal sw_stop to the control circuit 23.
The start-up circuit 21 secures the power source voltage VCC of the control IC 12 by supplying a start-up current to the VCC terminal before starting a switching operation. The oscillation circuit 22 generates the on-trigger signal on_trg and the off-trigger signal off_trg whose switching frequency is controlled by the voltage at the FB terminal. The control circuit 23 supplies the high-side drive signal hi_pre and the low-side drive signal lo_pre to the high-side drive circuit 24 and the low-side drive circuit 25 based on the switching frequency and causes the high side and the low side to operate alternately. The load detection circuit 26 detects the load state on the secondary side on the primary side.
As illustrated in FIG. 11, the load detection circuit 26 has switches sw1 and sw2 connected in series and one terminal of the switch sw1 is connected to the IS terminal of the control circuit 23 and one terminal of the switch sw2 is connected to the GND terminal of the control circuit 23. The IS terminal is connected to a shunt circuit 30 including the capacitor Cs and the resistor Rs and inputs the signal IS obtained by converting a resonant current into a voltage signal. A point A that is a common connection point between the switches sw1 and sw2 is connected to the CA terminal of the control circuit 23 via a resistor Rf. To the CA terminal, the capacitor Cca is connected and an averaging circuit 31 including the resistor Rf and the capacitor Cca averages the voltage signal A at the point A. Further, the control terminal of the switch sw1 is connected to the sw_ctrl terminal to receive the signal sw_ctrl from the control circuit 23 and the control terminal of the switch sw2 is connected to the sw_ctrl terminal via an inverter circuit 32. Here, the switches sw1 and sw2 and the inverter circuit 32 form a switch circuit 33 and generate the voltage signal A proportional to an input current at the point A by making use of the signal SI or the like.
The load detection circuit 26 has an automatic burst control signal generation circuit 34. The automatic burst control signal generation circuit 34 includes a comparator 35. The inverting input terminal of the comparator 35 is connected to the CA terminal and to the non-inverting input terminal, reference voltages Vref1h and Vref1l that are threshold values for determining a light load are supplied. Since the reference voltages Vref1h and Vref1l have two values, the comparator 35 forms a hysteresis comparator.
The load detection circuit 26 receives the signal sw_ctrl from the control circuit 23. As illustrated in FIG. 12, this signal sw_ctrl corresponds to the high-side reference voltage VS at the VS terminal. That is, the voltage HO at the HO terminal and the voltage LO at the LO terminal alternately turn to the H (high) level and when the high-side reference voltage VS is at the H level, the signal sw_ctrl turns to the H level and when the high-side reference voltage VS is at the L (low) level, the signal sw_ctrl turns to the L level.
Consequently, the switch sw1 remains on from the rise until the fall of the high-side reference voltage VS and applies a high-side current I_Qa, i.e., a voltage proportional to the input current to the switching power supply apparatus to the point A. The switch sw2 remains on from the fall until the rise of the high-side reference voltage VS and applies a voltage (=zero. This is because during this period of time, the high-side switching element Qa is off, and therefore, the input current is zero.) proportional to the high-side current I_Qa during this period of time with the point A grounded to the point A. Due to this, to the point A, a voltage exactly proportional to the high-side current I_Qa (input current) is applied and the voltage is averaged by the averaging circuit 31 and the averaged voltage CA becomes a signal indicating a load state. That is, the load state, i.e., the output power is equal to the input power except for the conversion loss and the input power is the product of the input current and the input voltage Vi, and therefore, when the input voltage Vi is constant, (the average value of) the input current becomes a signal indicating a load state.
The voltage CA indicating a load state is supplied to the automatic burst control signal generation circuit 34 and whether the load is heavy or light is determined. That is, when the load is heavy, a large resonant current flows and the voltage CA is higher than the reference voltage Vref1h, and therefore, the comparator 35 supplies the burst enable signal bur_en at the L level to the burst control circuit 27. On the other hand, when the load becomes light and the voltage VCA becomes lower than the reference voltage Vref1l, the comparator 35 supplies the burst enable signal bur_en at the H level to the burst control circuit 27.
Upon receipt of the burst enable signal bur_en at the H level from the load detection circuit 26, the burst control circuit 27 starts burst control and generates a switching control signal sw_stop that causes the control circuit 23 to periodically perform switching and switching stop. That is, as illustrated in FIG. 13, during the burst control, the control circuit 23 repeats the switching operation and the switching stop with a period Tpb made up of a period of time Tpb1 during which switching is performed and a period of time Tpb2 during which switching is stopped as one period.
In the example illustrated in FIG. 13, the burst control circuit 27 counts the on-trigger signal on_trg output by the oscillation circuit 22 with a built-in counter and when the count number reaches “5”, the burst control circuit 27 turns the switching control signal sw_stop to the H level. Due to this, the next on-trigger signal on_trg becomes invalid and the voltage HO at the high-side HO terminal remains the L level, and thus, the switching operation is stopped. Next, when the count number of the invalid on-trigger signals on_trg reaches “3”, the switching control signal sw_stop turns to the L level. Due to this, the next on-trigger signal on_trg becomes valid and the voltage LO at the H level is output from the low-side LO terminal in synchronization with the rise of the on-trigger signal on_trg, and thus, switching is returned.
Here, during the period of time Tpb2 during which the switching operation is stopped, i.e., in the state where the switching elements Qa and Qb are off, a resonant phenomenon occurs due to an LC circuit including the capacitors Ca and Cb. At this time, the voltage (the high-side reference voltage VS at the VS terminal) that appears at one end of the primary winding P1 of the transformer T1 and a current ILr that flows through the primary winding P1 oscillate with a period Tp1 as illustrated in FIG. 13. This period Tp1 is represented asperiod Tp1=2*π√(L*C).Here, L is a combined inductance of the resonant inductance and the excitation inductance of the transformer T1. Further, C is a combined capacitance of the capacitors Ca and Cb connected in equivalently parallel and the resonant capacitor C5 connected in series with the capacitors Ca and Cb. That is, if the capacitances of the capacitors Ca and Cb are taken to be Ca and Cb and the capacitance of the resonant capacitor C5 is taken to be Cr, C is represented asC=(Ca+Cb)*Cr/(Ca+Cb+Cr).That is, during the period of time of the burst control, switching is returned in the state where the LC circuit is resonating.
The timing of return of switching in the burst control is the timing of rise of the on-trigger signal on_trg that is output from the oscillation circuit 22. At this time, the high-side reference voltage VS at the VS terminal fluctuates at all times, and therefore, there is a case where the low-side switching element Qb turns on at the timing when the high-side reference voltage VS is high. At this time, an energy loss Ploss of the capacitors Ca and Cb is represented asPloss=0.5*(Ca+Cb)*VS_ON^2where the high-side reference voltage VS at the time of return of switching is VS_ON. That is, the energy loss Ploss of the capacitors Ca and Cb is proportional to the square of the voltage VS_ON at the time of return of switching, and therefore, the higher the voltage VS_ON at the time of return of switching, the greater the energy loss Ploss of the capacitors Ca and Cb is. Further, at the time of return of switching, the charges stored in the capacitors Ca and Cb are discharged instantaneously by the switching element Qb, and therefore, there has been such a problem that noise occurs because a large current flows.